Detronyx delivers a chip-as-product platform for OEMs building secure agentic devices. Silicon engineered for hardware-rooted security, a reference board, a firmware SDK with agent primitives, and a 3D enclosure reference — all owned end-to-end. You start from a working module and customise it to your device's use-case, not from a die you have to integrate. Attestation, key storage, secure boot, and capability-scoped agent primitives are baked into the silicon, not bolted on top.
OEMs building a secure agentic device today have two bad options: bolt security on top of an off-the-shelf microcontroller, or hire a chip-design team and become the integrator across silicon, firmware, board, and enclosure. Each option fragments the audit trail at exactly the layer where field defects hide.
Silicon → firmware, silicon → board, board → mechanical. Each handoff is a fresh translation of intent, captured in three different document classes. By the first board respin, the four views — spec, firmware, schematic, mechanical — have already drifted.
When firmware, board, and mechanical agents author against the same IR your hardware team uses, drift becomes a verifiable build property, not a tribal-knowledge tax.
Three discipline pillars on top of our silicon — the layers we own end-to-end so the chip ships as a working module, not a die you have to integrate.
Embedded firmware, RTOS bring-up, and deterministic schedulers — built directly against the same intermediate representation as the silicon, with agent-native security primitives wired in from boot.
Case study coming →
Schematic capture, multilayer PCB layout, signal-integrity and EMC analysis. The full board-level integration story your customer demands when first silicon ships — handled end-to-end.
Case study coming →
Enclosure CAD, thermal simulation, vibration and mounting analysis. From bare PCB to finished module — the mechanical envelope is part of the deliverable, not an afterthought.
Case study coming →
Each agent has a contract — what it sees in the IR, what it can write, what it must escalate. Cross-domain coupling goes through the IR, not through the agents. Agents draft; humans decide.
Each agent has a contract: what it sees in the IR, what it can write, what it must escalate. Cross-domain coupling goes through the IR, not through the agents.
Every design decision is captured as a structured artefact: rationale, alternatives, trade-off, owner. The audit trail is a build-output, not a documentation tax bolted on after.
No agent acts unilaterally on safety-relevant decisions. The methodology is built around human judgement and human accountability — the AI loop accelerates, it does not replace.
One state, every domain. Firmware, board, and 3D-mechanical agents read and write against a single source of truth — the same IR — and co-optimize across domains rather than in silos. A pin-budget shift on the board re-plans firmware drivers and re-checks enclosure cut-outs in the same transaction. This is the protocol's core, not a feature on top of it.
Agents work on their own optimized internal graphs. A thin program layer translates those artefacts into whatever EDA, mech-CAD, or revision-control format your team already uses — Synopsys, Cadence, Siemens for board and silicon flows; SolidWorks, NX, Creo for mechanics; or in-house tooling. We adapt to your stack; we do not ask you to adopt ours.
The 8051E ISA evolution — three finite domains, five mechanisms, 17 new ops across MOVX_IRAM, ATOMIC_BIT, AUTH, UPDATE, SYSTEM_MANAGEMENT classes — is the first chip programme we are building under the Open Co-Design Protocol. It is the testbed; the methodology is the product.
We intend to publish the methodology as an open specification. Implementation libraries, agent role contracts, and IR schemas will be released in stages alongside the silicon programme.
The same loop that builds the chip builds its verification evidence. By the time silicon reaches a verification team, the methodology has produced the design-history file, the EC scaffolding, the regression manifest, and the trace-decode reference — as build-outputs, not as documentation tasks.